add: documentation: memory

documentation/memory/page_table.md

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+# PAGE TABLE
+
+A page table (or PT) is an 1024 array of 32bit value(Page Table Entry (or PTE)). The address of the PT is store in the [PD](./page_directory.md).
+
+## Page Table Entry (PTE)
+The value is a 20 first bits of the [frame](./frame.md) address and the 12 last bit is for the flag.
+
+### Not used PTE value
+To say to the [MMU](./mmu.md) the page is currently not attribued to a frame you should put the (PTE index << 12)
+
+## Indexed Size
+Cause our kernel use 4096byte page and a PT can store 1024 value, each PT index 1024 * 4096Byte = 4MB of address.