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feature: apic is now enabled and the double fault interrupt at boot no longer occurs

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0x35c
2024-10-03 15:20:19 +02:00
parent 9479515685
commit d6b35a2786
9 changed files with 255 additions and 29 deletions
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39
src/interrupt/idt.c
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@ -1,39 +1,22 @@
#include "sys/io.h"
#include <stdbool.h>
#include <stdint.h>
#include "apic.h"
#include "gdt.h"
#include "idt.h"
#define PIC1 0x20 /* IO base address for master PIC */
#define PIC2 0xA0 /* IO base address for slave PIC */
#define PIC1_COMMAND PIC1
#define PIC1_DATA (PIC1 + 1)
#define PIC2_COMMAND PIC2
#define PIC2_DATA (PIC2 + 1)
extern void *isr_stub_table[];
__attribute__((aligned(0x10))) static struct idt_entry idt_entries[IDT_SIZE];
static struct idt_descriptor idtr;
/*
static void set_idt_entry_value(uint16_t *target, uint32_t offset,
uint16_t selector, uint8_t dpl,
uint8_t gate_type)
{
// Encode the offset
target[0] = offset & 0xFFFF; // Low 16 bits
target[3] = (offset >> 16) & 0xFFFF; // High 16 bits
// Encode the presence (bit 15)
target[1] |= 1 << 15;
// Encode the CPU Privilege Levels (DPL)
target[1] &= ~(0b11 << 13); // Clear previous DPL
target[1] |= (dpl & 0b11) << 13; // Set new DPL
// Clear bit 12 (always 0 for interrupts)
target[1] &= ~(1 << 12);
// Encode Gate Type
target[1] &= ~0x0F00; // Clear previous gate type
target[1] |= (gate_type & 0x0F) << 8; // Set new gate type
// Encode selector
target[2] = selector;
}*/
void idt_set_descriptor(uint8_t index, void *isr, uint8_t flags)
{
@ -53,7 +36,9 @@ void init_idt(void)
for (uint8_t i = 0; i < 32; i++)
idt_set_descriptor(i, isr_stub_table[i], 0x8E);
__asm__ volatile("lidt %0" : : "m"(idtr));
__asm__ volatile("sti");
pic_remap(32, 32);
pic_disable();
enable_apic();
}