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No commits in common. "8b2d35594d746df23b0b5cd02dfd59a84c964f8e" and "64a3f6ee0da3220a7b650b94b7fa8946b019364a" have entirely different histories.
8b2d35594d
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64a3f6ee0d
@ -30,12 +30,3 @@ void init_gdt();
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#define GDT_ACCESS_RW_READABLE_FOR_CODE_WRITABLE_FOR_DATA 0b00000010
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#define GDT_ACCESS_A_ACCESSED 0b00000001
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#define GDT_ACCESS_A_NOT_ACCESSED 0b00000000
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extern uint8_t gdt_entries[GDT_SIZE * 8];
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#define GDT_OFFSET_KERNEL_CODE 0x08
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#define GDT_OFFSET_KERNEL_DATA 0x10
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#define GDT_OFFSET_KERNEL_STACK 0x18
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#define GDT_OFFSET_USER_CODE 0x20
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#define GDT_OFFSET_USER_DATA 0x28
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#define GDT_OFFSET_USER_STACK 0x30
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@ -6,15 +6,4 @@ struct idt_descriptor {
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uint32_t offset;
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} __attribute__((packed));
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struct idt_entry {
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uint16_t isr_low; // The lower 16 bits of the ISR's address
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uint16_t kernel_cs; // The GDT segment selector that the CPU will load
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// into CS before calling the ISR
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uint8_t reserved; // Set to zero
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uint8_t attributes; // Type and attributes; see the IDT page
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uint16_t isr_high; // The higher 16 bits of the ISR's address
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} __attribute__((packed));
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#define IDT_SIZE 256
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void init_idt(void);
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@ -42,7 +42,7 @@ void init_gdt(void)
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set_gdt_entry_value(gdt_entries + 0x00, 0, 0, 0, 0); // Null segment
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_KERNEL_CODE, 0, 0xFFFFF,
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gdt_entries + 0x08, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_KERNEL_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_EXECUTABLE |
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GDT_ACCESS_DC_NOT_CONFORM |
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@ -50,7 +50,7 @@ void init_gdt(void)
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GDT_ACCESS_A_ACCESSED,
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GDT_FLAG_32BIT_MODE | GDT_FLAG_PAGE_MODE); // Kernel code
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_KERNEL_DATA, 0, 0xFFFFF,
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gdt_entries + 0x10, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_KERNEL_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_NOT_EXECUTABLE |
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GDT_ACCESS_DC_NOT_CONFORM |
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@ -58,7 +58,7 @@ void init_gdt(void)
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GDT_ACCESS_A_ACCESSED,
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GDT_FLAG_32BIT_MODE | GDT_FLAG_PAGE_MODE); // Kernel data
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_KERNEL_STACK, 0, 0xFFFFF,
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gdt_entries + 0x18, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_KERNEL_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_NOT_EXECUTABLE |
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GDT_ACCESS_DC_CONFORM |
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@ -67,7 +67,7 @@ void init_gdt(void)
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GDT_FLAG_32BIT_MODE | GDT_FLAG_PAGE_MODE); // Kernel stack
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_USER_CODE, 0, 0xFFFFF,
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gdt_entries + 0x20, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_USER_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_EXECUTABLE |
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GDT_ACCESS_DC_CONFORM |
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@ -75,7 +75,7 @@ void init_gdt(void)
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GDT_ACCESS_A_ACCESSED,
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GDT_FLAG_32BIT_MODE | GDT_FLAG_PAGE_MODE); // User code
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_USER_DATA, 0, 0xFFFFF,
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gdt_entries + 0x28, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_USER_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_NOT_EXECUTABLE |
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GDT_ACCESS_DC_NOT_CONFORM |
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@ -83,7 +83,7 @@ void init_gdt(void)
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GDT_ACCESS_A_ACCESSED,
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GDT_FLAG_32BIT_MODE | GDT_FLAG_PAGE_MODE); // User data
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set_gdt_entry_value(
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gdt_entries + GDT_OFFSET_USER_STACK, 0, 0xFFFFF,
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gdt_entries + 0x30, 0, 0xFFFFF,
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GDT_ACCESS_P_VALID | GDT_ACCESS_DPL_USER_MODE |
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GDT_ACCESS_S_CODE_OR_DATA | GDT_ACCESS_E_NOT_EXECUTABLE |
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GDT_ACCESS_DC_CONFORM |
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@ -3,8 +3,6 @@
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#include <stdint.h>
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__attribute__((noreturn)) void exception_handler(void);
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void exception_handler(void)
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{
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int8_t index = -1;
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@ -1,59 +1,36 @@
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#include <stdbool.h>
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#include <stdint.h>
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#include "gdt.h"
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#include "idt.h"
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extern void *isr_stub_table[];
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uint16_t idt_entries[IDT_SIZE * 4];
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struct idt_descriptor idtr;
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__attribute__((aligned(0x10))) static struct idt_entry idt_entries[IDT_SIZE];
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static struct idt_descriptor idtr;
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/*
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static void set_idt_entry_value(uint16_t *target, uint32_t offset,
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uint16_t selector, uint8_t dpl,
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uint8_t gate_type)
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{
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// Encode the offset
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target[0] = offset & 0xFFFF; // Low 16 bits
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target[3] = (offset >> 16) & 0xFFFF; // High 16 bits
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target[0] = offset & 0xFFFF;
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target[3] = (offset >> 16) & 0xFFFF;
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// Encode the presence (bit 15)
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// Encode the presence
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target[1] |= 1 << 15;
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// Encode the CPU Privilege Levels (DPL)
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target[1] &= ~(0b11 << 13); // Clear previous DPL
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target[1] |= (dpl & 0b11) << 13; // Set new DPL
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// Encode the CPU Privilege Levels
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target[1] = (0b11 << 13) & dpl;
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// Clear bit 12 (always 0 for interrupts)
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target[1] &= ~(1 << 12);
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// Encode Gate Type
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target[1] &= ~0x0F00; // Clear previous gate type
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target[1] |= (gate_type & 0x0F) << 8; // Set new gate type
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target[1] |= gate_type & 0x0F00;
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// Encode selector
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target[2] = selector;
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}*/
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void idt_set_descriptor(uint8_t index, void *isr, uint8_t flags)
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{
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struct idt_entry *descriptor = &idt_entries[index];
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descriptor->isr_low = (uint32_t)isr & 0xFFFF;
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descriptor->kernel_cs = GDT_OFFSET_KERNEL_CODE;
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descriptor->attributes = flags;
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descriptor->isr_high = (uint32_t)isr >> 16;
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descriptor->reserved = 0;
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}
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void init_idt(void)
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{
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idtr.offset = (uintptr_t)&idt_entries[0];
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idtr.size = (uint16_t)sizeof(struct idt_entry) * IDT_SIZE - 1;
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for (uint8_t i = 0; i < 32; i++)
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idt_set_descriptor(i, isr_stub_table[i], 0x8E);
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__asm__ volatile("lidt %0" : : "m"(idtr));
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__asm__ volatile("sti");
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idtr.size = 8 * IDT_SIZE - 1;
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idtr.offset = (uint32_t)&idt_entries;
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}
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@ -3,14 +3,12 @@
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.macro isr_err_stub nb
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isr_stub_\nb:
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movb bl, \nb
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call exception_handler
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iret
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.endm
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.macro isr_no_err_stub nb
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isr_stub_\nb:
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movb bl, \nb
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call exception_handler
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iret
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.endm
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10
src/kernel.c
10
src/kernel.c
@ -1,6 +1,5 @@
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#include "alloc.h"
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#include "gdt.h"
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#include "idt.h"
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#include "kpanic.h"
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#include "kprintf.h"
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#include "memory.h"
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@ -28,6 +27,13 @@ void kernel_main(void)
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terminal_initialize();
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init_gdt();
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init_memory();
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init_idt();
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kprintf(KERN_CRIT "KERN_CRIT\n");
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kprintf(KERN_ALERT "KERN_ALERT\n");
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kprintf(KERN_WARNING "KERN_WARNING\n");
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kprintf(KERN_NOTICE "KERN_NOTICE\n");
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kprintf(KERN_INFO "KERN_INFO\n");
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kprintf(KERN_DEBUG "KERN_DEBUG\n");
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void *ptr = vmalloc(100);
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kprintf("%d\n", ksize(ptr));
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shell_init();
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}
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