126 lines
3.8 KiB
ArmAsm
126 lines
3.8 KiB
ArmAsm
# Declare constants for the multiboot header.
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.set ALIGN, 1<<0 # align loaded modules on page boundaries
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.set MEMINFO, 1<<1 # provide memory map
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.set FLAGS, ALIGN | MEMINFO # this is the Multiboot 'flag' field
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.set MAGIC, 0x1BADB002 # 'magic number' lets bootloader find the header
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.set CHECKSUM, -(MAGIC + FLAGS) # checksum of above, to prove we are multiboot
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# Declare a multiboot header that marks the program as a kernel.
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.section .multiboot.data, "aw"
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.align 4
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.long MAGIC
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.long FLAGS
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.long CHECKSUM
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# Allocate the initial stack.
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.section .bootstrap_stack, "aw", @nobits
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stack_bottom:
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.skip 16384 # 16 KiB
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stack_top:
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# Preallocate pages used for paging. Don't hard-code addresses and assume they
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# are available, as the bootloader might have loaded its multiboot structures or
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# modules there. This lets the bootloader know it must avoid the addresses.
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.global boot_page_directory
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.global boot_page_table1
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.section .bss, "aw", @nobits
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.align 4096
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boot_page_directory:
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.skip 4096
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boot_page_table1:
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.skip 4096
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# Further page tables may be required if the kernel grows beyond 3 MiB.
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# The kernel entry point.
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.section .multiboot.text, "a"
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.global _start
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.type _start, @function
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_start:
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# Physical address of boot_page_table1.
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# TODO: I recall seeing some assembly that used a macro to do the
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# conversions to and from physical. Maybe this should be done in this
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# code as well?
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movl $(boot_page_table1 - 0xC0000000), %edi
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# First address to map is address 0.
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# TODO: Start at the first kernel page instead. Alternatively map the first
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# 1 MiB as it can be generally useful, and there's no need to
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# specially map the VGA buffer.
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movl $0, %esi
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# Map 1023 pages. The 1024th will be the VGA text buffer.
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movl $1023, %ecx
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1:
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# Only map the kernel.
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cmpl $_kernel_start, %esi
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jl 2f
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cmpl $(_kernel_end - 0xC0000000), %esi
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jge 3f
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# Map physical address as "present, writable". Note that this maps
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# .text and .rodata as writable. Mind security and map them as non-writable.
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movl %esi, %edx
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orl $0x003, %edx
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movl %edx, (%edi)
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2:
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# Size of page is 4096 bytes.
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addl $4096, %esi
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# Size of entries in boot_page_table1 is 4 bytes.
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addl $4, %edi
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# Loop to the next entry if we haven't finished.
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loop 1b
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3:
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# Map VGA video memory to 0xC03FF000 as "present, writable".
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movl $(0x000B8000 | 0x003), boot_page_table1 - 0xC0000000 + 1023 * 4
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# The page table is used at both page directory entry 0 (virtually from 0x0
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# to 0x3FFFFF) (thus identity mapping the kernel) and page directory entry
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# 768 (virtually from 0xC0000000 to 0xC03FFFFF) (thus mapping it in the
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# higher half). The kernel is identity mapped because enabling paging does
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# not change the next instruction, which continues to be physical. The CPU
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# would instead page fault if there was no identity mapping.
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# Map the page table to both virtual addresses 0x00000000 and 0xC0000000.
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movl $(boot_page_table1 - 0xC0000000 + 0x003), boot_page_directory - 0xC0000000 + 0
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movl $(boot_page_table1 - 0xC0000000 + 0x003), boot_page_directory - 0xC0000000 + 768 * 4
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# Set cr3 to the address of the boot_page_directory.
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movl $(boot_page_directory - 0xC0000000), %ecx
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movl %ecx, %cr3
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# Enable paging and the write-protect bit.
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movl %cr0, %ecx
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orl $0x80000000, %ecx
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movl %ecx, %cr0
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# Jump to higher half with an absolute jump.
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lea 4f, %ecx
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jmp *%ecx
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.section .text
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4:
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# At this point, paging is fully set up and enabled.
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# Unmap the identity mapping as it is now unnecessary.
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movl $0, boot_page_directory + 0
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# Reload crc3 to force a TLB flush so the changes to take effect.
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movl %cr3, %ecx
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movl %ecx, %cr3
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# Set up the stack.
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mov $stack_top, %esp
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push %eax
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push %ebx
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# Enter the high-level kernel.
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call kernel_main
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# Infinite loop if the system has nothing more to do.
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cli
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1: hlt
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jmp 1b
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